The present invention relates to solid-state imaging apparatus for example for use in a digital camera, digital video camera, endoscope, etc.
In recent years, size reduction and power saving of the digital camera/digital video camera or of the endoscope are advanced and make it increasingly inevitable to correspondingly reduce size and power consumption of the solid-state imaging apparatus to be used in these. To achieve such a reduction in size and power consumption, solid-state imaging apparatus having an AD conversion circuit formed of digital circuits have been proposed for example in Japanese Patent Application Laid-Open 2006-287879.
FIG. 1 is a block diagram schematically showing construction of a prior-art solid-state imaging apparatus. In this solid-state imaging apparatus, a pixel section is two-dimensionally arranged or in the illustrated example formed into a 4-row by 5-column array of blocks (sub-array) B1, B2, . . . each containing a pixel block 201 where pixel cells having photoelectric conversion device are two-dimensionally arranged into an array and an AD conversion section 202 for the AD-conversion of the signals from the pixel block 201. FIG. 2 is a block diagram showing an example of the circuit construction of the AD conversion section 202 in FIG. 1. The AD conversion section 202 includes a delay circuit 211 where delay devices for giving a delay amount corresponding to an input voltage to a running pulse are connected into a multiple of stages, and an encoder 212 where running position of such pulse is sampled and encoded at every predetermined timing to generate a digital value corresponding to the input voltage. It is to generate a digital value corresponding to the input voltage according to an input signal.